Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science or equivalent practical experience.

• 3 years of experience with computer architecture concepts, including microarchitecture, cache hierarchy, pipelining, and memory subsystems.

• Experience with power management.

Preferred qualifications:

• Master's degree in Electrical Experience, Computer Science, or equivalent experience.

• Experience in design and analysis of full chip power with an understanding of clock, reset, and power sequencing interactions.

• Experience in low power design including UPF/CPF, multi-voltage domains, power gating, and on chip power management IP design.

• Experience in post-silicon power calibrations and debug.

• Experience in Verilog, SystemVerilog, RTL and gate-level SPICE simulations, and statistical SPICE models.

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

• Define and drive power methodology for design, verification and implementation of deep sub­micron SoCs.

• Define and develop generic power management IPs to drive clock, reset and power controls.

• Define and develop innovative schemes to achieve power reduction from circuit to system level.

• Develop methodology and tools for implementing power reduction. Work with tool vendors to address any power-related tool or flow issues.

• Work with architects, logic and circuit and physical designers to understand the power requirements and define all power specs and budgets.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.