As a Hardware Design Engineer, your main responsibilities will include:

• Solid understanding of physical design flows

• level netlist synthesis

• Physical implementation (floorplanning, placement, CTS, routing)

• Static Timing analysis and signoff closure

• EMIR analysis and signoff closure

Who You'll Work With

In addition to working alongside talented colleagues, candidates will have many opportunities to learn through coaching and stretch assignment opportunities. They will be guided by feedback and support to accelerate the learning and maximize their knowledge.

Who You Are

Essential requirements:

• BS/MS in Electrical Engineering or Computer Science

• 6+ year minimum of hands-on experience in ASIC design

• and design constraints

• level synthesis, place and route, timing closure.

• standard PnR and signoff tools and their capabilities

• Understanding of basic power Analysis and power integrity Analysis

• Excellent English verbal and written communication skills.

• Self-motivated, able to work independently or as a team player

Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.

Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.